本人刚学FPGA，写了个把输入80MHZ的时钟分频，用LED显示出来，一秒闪一次。请各位大侠指点一下

好像好多错误~~~

module blinkled(clk,reset,led)
input clk,reset;
output [2:0]led;
reg [31:0]counter;

assign led[0]=(counter < 40000000 )?0:1; // 0.5Hz
assign led[1]=(counter < 40000000 )?1:0;
assign led[2]=(counter < 20000000 || ( ( counter > 40000000 ) && (counter < 60000000) ))?0:1; // 0.25Hz

always @(posedge clk or negedge reset)
begin
if ( ~reset )begin
led_r <= 3'b111;
counter <= 32'h0000_0000;
end
else if ( counter < 32'd ) // 80MHz -> 12.5ns
// 12.5ns X 80000000 = 1s
counter <= 32'h0000_0000;
else
counter <= counter + 1'b1;
end
endmodule