毕业设计摘要翻译（汉译英），谢绝用机器翻译，谢谢！

This article elaborated the UART asynchronous serial communicationprinciple, the FPGA basic structure and the development flow as wellas the development direction, introduced FPGA development softwareQuartusII and simulation software Modelsim. Completes UART controllerVerilog the HDL procedure, obtains the correct simulation profilethrough Modelsim simulation software. FPGA is English FieldProgrammable Gate Array abbreviation, namely the scene programmablegate array, it is the product which in PAL, GAL, EPLD and so on in theprogrammable component foundation further develops. It is took thespecial-purpose integrated circuit (ASIC) in the domain one kindpartly has custom-made, both solves has had custom-made the electriccircuit which the electric circuit appears the insufficiency, and hasovercome the original programmable component gate number limitedshortcoming. UART is Universal Asynchronous Receiver the Transmittergeneral asynchronous transceiver, is the widespread use serial datatransmission sdt agreement. Asynchronous serial communication requesttransmission line few, reliability high, the transmitting range isfar, is widely applied the data exchange which and outside supposes tothe microcomputer. In the computer, UART is connected to produces thecompatible RS232 standard signal electric circuit. The RS232 standarddefinition logic "1" the signal is opposite to the place is 3 to 25volts, but the logic "0" is opposite to the place is -3 to -25 volt.Therefore, when in micro controller UART is connected to PC, it needsa RS232 driver to transform the level. Realizes the UART function withFPGA, may reduce the system the area, reduces the system the powerloss, enhances the design the stability, also fully has used the FPGAsurplus resources.

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